Non-volatile memory systems, such as flash memory, have been widely adopted for use in consumer products. Flash memory may be found in different forms, for example in the form of a portable memory card that can be carried between host devices or as a solid state disk (SSD) embedded in a host device. As the non-volatile memory cell scales to smaller dimensions with higher capacity per unit area, the cell endurance due to program and erase cycling, and disturbances (e.g. due to either read or program) may become more prominent. The defect level during the silicon process may become elevated as the cell dimension shrinks and process complexity increases. Likewise, time and temperature may hinder data retention (DR) in a memory device. Increased time and/or temperature may cause a device to wear more quickly and/or lose data (i.e. data retention loss). Bit error rate (BER) may be used as an estimate for wear, DR, or remaining margin; however, BER is merely the result of the problem and may not be an accurate predictor. Further, using BER does allow a distinction between memory wear and data retention. For example, a high BER may be caused by any one of wear, read disturb errors, DR, or other memory errors.